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COMe-bSC2 / BIOS Operation
CPU Configuration
Feature Options Description
Hyper-Threading Disabled
Enabled
Enables/Disables the Intel® Hyper Threading
Technology HTT supported by Core i7/i5
Active Proc Cores
All
1
2
3
Number of cores to enable in each processors package
Execute Disable Bit Disabled
Enabled
XD can prevent certain classes of malicious buffer
overflow attacks when combined with a supporting OS
Hardware Prefetcher Disabled
Enabled
Turn on/off the MLC streamer prefetcher
Adj. Cache Line Pref. Disabled
Enabled
Turn on/off prefetching of adjacent cache lines
Intel Virtualization Technology Disabled
Enabled
When enabled, a VMM can utilize the additional
hardware capabilities provided by Vanderpool
Technology
81
- COMe-bSC2 1
- » Table of Contents « 3
- 1 User Information 6
- 1.5 Warranty 7
- 1.6 Technical Support 7
- 2 Introduction 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 12
- Graphics Core 14
- Connectivity 15
- Misc Interfaces and Features 16
- Kontron Features 16
- Additional features 16
- Power Features 17
- 3.3 Block Diagram 18
- 3.4 Variant Matrix 18
- 3.5 Accessories 19
- 3.6 Electrical Specification 20
- 3.6.5 ATX Mode 21
- 3.6.6 Single Supply Mode 21
- 3.7 Power Control 22
- 3.8.2 Humidity 23
- WEEE Directive 24
- Conformal Coating 24
- Shock & Vibration 25
- 3.10 MTBF 26
- 3.11 Mechanical Specification 27
- 3.12 Module Dimensions 28
- 3.14 Onboard Fan Connector 30
- 4 Features and Interfaces 31
- 4.2 Rapid Shutdown 32
- 4.5 SPI boot 35
- Using an external SPI flash 36
- 4.6 M.A.R.S 37
- 4.7 Fast I2C 38
- Configuration 39
- Time-out events 40
- WDT Signal 40
- 4.10 Speedstep Technology 41
- 4.11 C-States 42
- 4.12 Hyper Threading 43
- 4.13 VID-x 44
- 4.16 Display Configuration 48
- DDI Design Consideration 51
- DVI-I Design Topology 51
- Requirements 52
- Setup a Multi-monitor system 52
- 4.18 Intel® vPro™ technology 53
- 4.20 USB 55
- 5 System Resources 56
- 5.2 Memory Area 57
- 5.3 I/O Address Map 57
- 5.5 I2C Bus 58
- 5.6 JILI I2C Bus 58
- 5.7 SDVO I2C Bus 58
- 6 Connectors 60
- 7 Pinout List 61
- 7.2 Connector X1A Row A 62
- COMe-bSC2 / Pinout List 63
- 7.3 Connector X1A Row B 64
- 7.4 Connector X1B Row C 66
- 7.5 Connector X1B Row D 68
- 8 BIOS Operation 70
- 8.3 Setup Guide 72
- 8.4 POST Codes 72
- Item Specific Help Window 73
- General Help Window 73
- 8.5 BIOS Setup 74
- 8.5.2 Advanced 76
- PCI Subsystem Settings 78
- ACPI Settings 79
- Trusted Computing 80
- CPU Configuration 81
- CPU Information 82
- CPU PPM Configuration 83
- Miscellaneous 84
- Watchdog 85
- Smart Battery Configuration 86
- Battery Information 87
- Generic LPC Decode Ranges 88
- Thermal Configuration 89
- Passive Cooling 90
- PCH-FW Configuration 91
- Super IO Configuration 93
- Serial Port 0 Configuration 94
- Serial Port 1 Configuration 95
- Parallel Port Configuration 96
- H/W Monitor 97
- COMe-bSC2 / BIOS Operation 100
- Intel ICC 101
- Clock Spread Spectrum 102
- 8.5.3 Chipset 103
- SystemAgent Configuration 104
- Graphics Configuration 105
- LCD Control 106
- - DVI-I' 107
- Memory Configuration 109
- GT - Power Management Control 110
- PCH-IO Configuration 111
- LAN Configuration 112
- SATA Configuration 113
- HDA Configuration 115
- USB Configuration 116
- PCI Express Configuration 117
- 8.5.4 Boot 120
- Boot Option Priority 121
- 8.5.5 Security 122
- Set HDD Password 123
- 8.5.6 Save & Exit 124
- Corporate Offices 125
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