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COMe-bIP6 / BIOS Operation
Watchdog
Feature Options Description
Auto-reload
Disabled
Enabled
Enable automatic reload of watchdog timers on timeout
Global Lock
Disabled
Enabled
If set to enabled, all Watchdog registers (except
WD_KICK) become read only until the board is reset
Stage 1 Mode
Disabled
Reset
NMI
SCI
Delay
WDT Signal only
Select Action for first Watchdog stage
- Assert WDT Signal
Disabled
Enabled
Enable/Disable assertion of WDT signal to baseboard on
stage timeout
- Stage 1 Timout 1s
5s
10s
30s
1m
3m
10m
30m
Select Timeout value for first watchdog stage
Stage 2 Mode
Disabled
Reset
NMI
SCI
WDT Signal only
Select Action for second Watchdog stage
- Assert WDT Signal
Disabled
Enabled
Enable/Disable assertion of WDT signal to baseboard on
stage timeout
- Stage 2 Timout 1s
5s
10s
30s
1m
3m
10m
30m
Select Timeout value for second watchdog stage
88
- COMe-bIP6 1
- » Table of Contents « 3
- 1 User Information 6
- 1.5 Warranty 7
- 1.6 Technical Support 7
- 2 Introduction 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 12
- PCH comparison 15
- Graphics Core 16
- Connectivity 18
- Misc Interfaces and Features 19
- Kontron Features 19
- Additional features 19
- Power Features 19
- 3.3 Block Diagram COMe-bIP6 20
- Intel® 3rd Generation Core 21
- Connector AB – pin-out T6 21
- Intel® 7-Series PCH 21
- Connector CD – pin-out T6 21
- 3.5 Accessories 22
- 3.6 Electrical Specification 23
- 3.6.5 ATX Mode 24
- 3.6.6 Single Supply Mode 24
- 3.7 Power Control 25
- 3.8.2 Humidity 26
- WEEE Directive 27
- Conformal Coating 27
- Shock & Vibration 28
- 3.10 MTBF 29
- 3.11 Mechanical Specification 30
- 3.12 Module Dimensions 31
- 3.14 Onboard Fan Connector 33
- 4 Features and Interfaces 34
- 4.2 Rapid Shutdown 35
- 4.5 SPI boot 38
- Using an external SPI flash 39
- 4.6 M.A.R.S 40
- 4.7 UART 41
- 4.8 Fast I2C 42
- Configuration 43
- Time-out events 44
- WDT Signal 44
- 4.12 Speedstep Technology 47
- 4.13 C-States 48
- 4.14 Hyper Threading 49
- 4.16 VID-x 51
- 4.18 Display Configuration 53
- DDI Design Consideration 56
- DVI-I Design Topology 56
- 3 independent Display Support 56
- Requirements 57
- Setup a Multi-monitor system 57
- 4.20 Intel® vPro™ technology 58
- 5 System Resources 60
- 5.2 Memory Area 61
- 5.3 I/O Address Map 61
- 5.5 I2C Bus 62
- 5.6 JILI I2C Bus 62
- 5.7 SDVO I2C Bus 62
- 6 Connectors 64
- 7 Pinout List 65
- 7.2 Connector X1A Row A 66
- COMe-bIP6 / Pinout List 67
- 7.3 Connector X1A Row B 68
- 7.4 Connector X1B Row C 70
- 7.5 Connector X1B Row D 72
- 8 BIOS Operation 74
- 8.3 Setup Guide 76
- 8.4 POST Codes 76
- Item Specific Help Window 77
- General Help Window 77
- 8.5 BIOS Setup 78
- Platform Information 79
- 8.5.2 Advanced 80
- PCI Subsystem Settings 81
- ACPI Settings 82
- Trusted Computing 83
- CPU Configuration 84
- CPU Information 85
- Miscellaneous 86
- Onboard I2C Bus Configuration 87
- Watchdog 88
- Smart Battery Configuration 89
- Battery Information 90
- Generic LPC Decode Ranges 91
- Thermal Configuration 92
- Passive Cooling 94
- Intel Fast Flash Standby 95
- PCH-FW Configuration 96
- Firmware Update Configuration 97
- Module COM Port Configuration 99
- Super IO Configuration 100
- Serial Port 1 Configuration 101
- Serial Port 2 Configuration 102
- Parallel Port Configuration 103
- Serial Port 3 Configuration 104
- Serial Port 4 Configuration 105
- H/W Monitor 106
- COMe-bIP6 / BIOS Operation 107
- COM Port allocation 107
- Console Redirection Settings 108
- Intel ICC 109
- Clock Spread Spectrum 110
- CPU PPM Configuration 111
- 8.5.3 Chipset 112
- PCH-IO Configuration 113
- LAN Configuration 114
- SATA Configuration 115
- HDA Configuration 116
- USB Configuration 117
- PCI Express Configuration 118
- SystemAgent Configuration 120
- Graphics Configuration 121
- LCD Control 122
- - DVI-I' 123
- Memory Configuration 125
- Custom Memory Profile Control 126
- GT - Power Management Control 127
- 8.5.4 Boot 128
- Boot Option Priority 129
- 8.5.5 Security 130
- Set HDD Password 131
- 8.5.6 Save & Exit 132
- Corporate Offices 133
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